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Market Research Report
Cleanrooms and Contamination Control in VLSI Manufacturing
Published by
The Information Network
Published
2007/06
Content info
Product code
IF4960
Price
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US $ 2495
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Table of Contents
Chapter 1 Introduction
1.1 The Need For This Report
Chapter 2 Executive Summary
2.1 Summary of Major Findings
2.2 Summary of Market Forecast
Chapter 3 Cleanroom Design
3.1 Types of Cleanrooms
3.2 Minienvironments
3.2.1 200mm
3.2.2 300mm
3.3 Airflow Filtering
3.4 Electrostatic Discharge
3.5 Impact of ASIC Devices
3.6 Impact of VLSI Devices
3.7 Impact of Factory Automation and 300mm Wafers
Chapter 4 Worldwide Semiconductor Fabs
4.1 North American Fabs
Company
Address
Size of Wafer Processed
Minimum Feature Size
Process Technology
Principle Products
Employees
Plant Area
Cleanroom Area
4.2 European Fabs
Company
Address
Size of Wafer Processed
Minimum Feature Size
Process Technology
Principle Products
Employees
Plant Area
Cleanroom Area
4.3 Japanese Fabs
Company
Address
Size of Wafer Processed
Minimum Feature Size
Process Technology
Principle Products
Employees
Cleanroom Area
4.4 Korean Fabs
Company
Address
Size of Wafer Processed
Minimum Feature Size
Process Technology
Principle Products
Employees
Cleanroom Area
Total Sales
4.5 Taiwan Fabs
Company
Address
Size of Wafer Processed
Minimum Feature Size
Process Technology
Principle Products
Employees
Cleanroom Area
4.6 ROW Fabs
Company
Address
Size of Wafer Processed
Minimum Feature Size
Process Technology
Principle Products
Employees
Cleanroom Area
Chapter 5 Contamination Issues
5.1 Liquid Chemicals
5.1.1 Purification Methods
5.1.2 Particulates
Effects on Yield
Particulate Removal
Particle Monitoring
5.1.3 Bulk Distribution vs Bottles
5.1.4 Piping System Construction
Materials of Construction
Cost Analysis
5.2 Gases
5.2.1 Technology Issues
5.2.2 Requirements
Purification Alternatives
Purity Trends
Particulate Considerations
5.3 Deionized Water
5.3.1 Purification Specifications
5.3.2 Purification Specification
5.3.3 Purity Measurement Techniques
5.3.4 Filtration And Ultrafiltration
5.3.5 Piping System Construction
5.3.6 DI Water System Costs
5.4 Processing Equipment
5.4.1 Detection Methods
5.4.2 Removal Techniques
Chapter 6 Market Forecast
6.1 Market Forecast Assumptions
6.2 Cleanroom Construction
6.2.1 Cleanroom Design Criteria
6.2.2 Class 1 Construction Costs
6.2.3 Cleanroom Forecast
6.3 Wet Stations And Spray Processors
6.3 Forecasts of Liquid and Gas Filters
6.4 Gas Purification Systems Market
Chapter 7 Strategic User Issues
7.1 Cleanroom Personnel
7.2 User Requirements
7.2.1 Benchmarking a Vendor
7.3 Need for Standardization
Chapter 8 Strategic Supplier Issues
8.1 Process Equipment Cleanliness
8.2 Supplier Strategies
8.3 Supplier Opportunities
LIST OF TABLES
3.1 Cleanroom HVAC Requirements
3.2 General Cleanroom Operating Cost Breakdown
3.3 Equipment Minienvironments
3.4 Comparison Table of DRAM Production Factors
5.1 Advantages and Disadvantages of Various Cleaning Metho
5.2 Chemical and Material Compatibility
5.3 Piping System Economic Analysis for Positive Developer
5.4 Gas Control System Issues
5.5 Range of Purity of CVD Gases
5.6 Potential Hazards of Processing Gases
5.7 Particle Sources
5.8 Location of In-Situ Monitors By Equipment Type
6.1 Worldwide Wafer Fab Projects -- U.S.
6.2 Worldwide Wafer Fab Projects -- Japan
6.3 Worldwide Wafer Fab Projects -- Europe
6.4 Worldwide Wafer Fab Projects -- Korea
6.5 Worldwide Wafer Fab Projects - Taiwan
6.6 Worldwide Wafer Fab Projects - Asia
6.7 Market Shares Of Automated Wet Station Suppliers
6.8 Market Shares Of Spray Processor Suppliers
6.9 Market For Large Gas Purification Systems
6.10 Market For POU Gas Purification Systems
6.11 Market For Catalytic Absorption Purification Systems
6.12 Market For Catalytic Absorption Purification Systems
6.13 Market For Palladium Purification Systems
6.14 Market For Palladium Purification Systems
6.15 Market For Getter Purification Systems
6.16 Market For Getter Purification Systems
6.17 Market For Resin Purification Systems
6.18 Market For Resin Purification Systems
LIST OF FIGURES
1.1 Cleanroom Class Vs Feature Size
3.1 Fab Cost Versus Year
3.2 Contamination Levels With and Without SMIF Box
3.3 FOUP in Cluster Tool
3.4 Contamination Levels During Cleanroom Work Cycles
5.1 Relationship Between Device Yield and Particles
5.2 Relationship Between Die Yield and Chip Size
5.3 Sources of Particles
6.1 Cleanroom Class Vs Feature Size
6.2 Cost of a Semiconductor Facility
6.3 Equipment and Facility Cost Ratio
6.4 Fab Operational Cost Structure Versus Feature Size
7.1 Example of a QC Flow Chart
Related Report
2009 Discretes
2009 GPS Semiconductors
World Fab Forecast - Detailed Quarterly Forecast for the Frontend Semiconductor Fabs
2009 Logic
2009 Semiconductors
Please inform me when related publications are released
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