Abstract
INTRODUCTION
Miniaturization, portability, speed, and performance efficiency requirements
in end-application products have triggered significant advances in chip design
methodologies and yields.
Packaging binds the die to the board by acting as physical and electrical
interface. Packages not only protect the chip from mechanical damage such as
breakage and stress, they also prevent contamination and enable prior testing
of the chip before being incorporated into the system. Traditional
semiconductor packages have faced two major constraints: size and speed.
Hence, it is incumbent that the development in chip design should also be
reflected in the packaged being correspondingly efficient.
Despite the critical role played by packaging in the semiconductor
manufacturing life cycle, its value is not recognized to the extent required,
and the function is generally relegated to the status of being a peripheral
function.
The above perception of packaging is set to change with the advent of advanced
packaging techniques such as System-in-Package (SiP) that blur the distinction
between traditional Electronic Design Automation (EDA) functions and
traditional packaging functions. Another phenomenon that reflects the vibrancy
in packaging technique is the hectic patenting activity that is breaking new
ground in areas of thermal and electrical performance, miniaturization, and
process efficiencies. In short, the resurgent drive of the semiconductor
industry over the last half decade is being led by advanced packaging
techniques. Advanced packaging techniques form the semiconductor industry' s
answer to the increasing demand for lower costs, less time to market,
portability, and miniaturization. Like most functions in the semiconductor
lifecycle, packaging is being increasingly handled by specialists-the
Outsourced Semiconductor Packaging and Testing (OSPT) specialists. The report
is an effort to derive a snapshot of the OSPT specialist landscape and
forecast the future of this category that is truly representative of the
semiconductor industry. This report classifies the OSPT revenues across
end-user equipment and geographical regions.
The pertinence of this report is highlighted by the variety of design
challenges, regulatory requirements, and competition from incumbent
technologies that characterize the advanced electronic packaging landscape.
The report shall shed light on the advanced electronic packaging arena in the
backdrop of such formidable drivers and equally formidable challenges.
SCOPE OF STUDY
This report:
- Provides a complete technical market analysis of the advanced electronic
packaging business - Flipchip, BGA, CSP and others
- Covers assembly, bonding technologies, cooling technologies, materials,
modeling and simulation, passive devices, processing, substrates, thermal and
mechanical design and many other key areas.
- Provides market forecasts, by major and minor segment, for 2006-2011.
- Covers leading vendors, product innovations and technological
breakthroughs.
- Covers end-user markets such as Zigbee, WLAN, computer peripherals, mobile
phones, digital cameras, MP3 players, automotive, set-top boxes, power
amplifiers, and more.
- Includes standards, stakeholder issues, patent analyses, market shares,
R&D breakthroughs, competitive analysis.
INFORMATION SOURCES
This study refers to the following sources:
- Industry consortia
- Company financial details (Form 10-K, annual reports)
- Industry insights in form of published opinions
- Industry sources
ABOUT THE AUTHOR
Kaustubha Parkhi has worked in a broad range of functional roles with leading
telecom operators and service providers such as Reliance Infocomm, Ramco
Systems and BPL Cellular. He has written on a wide-ranging array of
telecommunications and electronics-related subjects based on his critical
analysis of the underlying technology and its business impact. Kaustubha holds
a B.S degree in Electronics and Telecommunications and a M.B.A. degree in
Systems.
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